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(parent: 4305b6e) | patch
drm/amd/display: Add required FRL registers for DCN31
authorRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Thu, 18 May 2023 19:49:27 +0000 (13:49 -0600)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 11 May 2026 20:15:07 +0000 (16:15 -0400)
commit5dfcaecc7e1f7cd54134b093993aa3449e79afae
tree2f6d1e11a0c749faef2714fc51646bf997644442tree | snapshot
parent4305b6e9705d1500fe7186aa27e764dc5d7b7871commit | diff
drm/amd/display: Add required FRL registers for DCN31

This commit introduces multiple hardware registers necessary to enable
FRL on AMD devices.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_offset.h diff | blob | blame | history
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h diff | blob | blame | history
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