Extend 16/32-bit vector bit_op patterns with (m,0,i) alternative.

Extend 16/32-bit vector bit_op patterns with (m,0,i) alternative.

And split it after reload.

gcc/ChangeLog:

	PR target/106038
	* config/i386/mmx.md (<code><mode>3): New define_expand, it's
	original "<code><mode>3".
	(*<code><mode>3): New define_insn, it's original
	"<code><mode>3" be extended to handle memory and immediate
	operand with ix86_binary_operator_ok. Also adjust define_split
	after it.
	(mmxinsnmode): New mode attribute.
	(*mov<mode>_imm): Refactor with mmxinsnmode.
	* config/i386/predicates.md
	(register_or_x86_64_const_vector_operand): New predicate.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/pr106038-1.c: New test.