RISC-V: Support rounding mode for VFMSAC/VFMSUB autovec

RISC-V: Support rounding mode for VFMSAC/VFMSUB autovec

There will be a case like below for intrinsic and autovec combination.

vfadd RTZ   <- intrinisc static rounding
vfmsub      <- autovec/autovec-opt

The autovec generated vfmsub should take DYN mode, and the
frm must be restored before the vfmsub insn. This patch
would like to fix this issue by:

* Add the frm operand to the autovec/autovec-opt pattern.
* Set the frm_mode attr to DYN.

Thus, the frm flow when combine autovec and intrinsic should be.

+------------
| frrm  a5
| ...
| fsrmi 4
| vfadd       <- intrinsic static rounding.
| ...
| fsrm  a5
| vfmsub      <- autovec/autovec-opt
| ...
+------------

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

	* config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
	* config/riscv/autovec.md: Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/float-point-frm-autovec-2.c: New test.