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clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE
authorYao Zi <ziyao@disroot.org>
Mon, 17 Feb 2025 06:11:43 +0000 (06:11 +0000)
committerHeiko Stuebner <heiko@sntech.de>
Wed, 26 Feb 2025 17:04:29 +0000 (18:04 +0100)
commit651aabc9fb0f354ad2ba5fd06a6011e652447489
treec2542ed754b4ab885c43435969ca2de2a7e3969ctree
parent3688efdbfda39428cfa325c4901f484a9cd001f1commit | diff
clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE

RK3528 comes with a new PLL variant: its "PPLL", which mainly generates
clocks for the PCIe controller, operates in normal mode only. Let's
describe it with flag ROCKCHIP_PLL_FIXED_MODE and handle it in code.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Link: https://lore.kernel.org/r/20250217061142.38480-7-ziyao@disroot.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-pll.c diff | blob | blame | history
drivers/clk/rockchip/clk.h diff | blob | blame | history
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git