]> git.ipfire.org Git - thirdparty/glibc.git/commit
AArch64: Implement AdvSIMD and SVE log10p1(f) routines
authorLuna Lamb <luna.lamb@arm.com>
Sat, 27 Sep 2025 10:37:29 +0000 (10:37 +0000)
committerWilco Dijkstra <wilco.dijkstra@arm.com>
Sat, 27 Sep 2025 12:45:59 +0000 (12:45 +0000)
commit653e6c4fffe31938239c5fd15ba26fbb23870d2e
tree415df2cda8e63205c36ccb2254eaec01c1fbf542
parentdb42732474ba0b7517a00b7652c90de7dc9dfa3a
AArch64: Implement AdvSIMD and SVE log10p1(f) routines

Vector variants of the new C23 log10p1 routines.

Note: Benchmark inputs for log10p1(f) are identical to log1p(f)

Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
18 files changed:
benchtests/libmvec/log10p1-inputs [new file with mode: 0644]
benchtests/libmvec/log10p1f-inputs [new file with mode: 0644]
bits/libm-simd-decl-stubs.h
math/bits/mathcalls.h
sysdeps/aarch64/fpu/Makefile
sysdeps/aarch64/fpu/Versions
sysdeps/aarch64/fpu/advsimd_f32_protos.h
sysdeps/aarch64/fpu/bits/math-vector.h
sysdeps/aarch64/fpu/finclude/math-vector-fortran.h
sysdeps/aarch64/fpu/log10p1_advsimd.c [new file with mode: 0644]
sysdeps/aarch64/fpu/log10p1_sve.c [new file with mode: 0644]
sysdeps/aarch64/fpu/log10p1f_advsimd.c [new file with mode: 0644]
sysdeps/aarch64/fpu/log10p1f_sve.c [new file with mode: 0644]
sysdeps/aarch64/fpu/test-double-advsimd-wrappers.c
sysdeps/aarch64/fpu/test-double-sve-wrappers.c
sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c
sysdeps/aarch64/fpu/test-float-sve-wrappers.c
sysdeps/unix/sysv/linux/aarch64/libmvec.abilist