]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
pinctrl: ocelot: fix system hang on level based interrupts
authorSergey Matsievskiy <matsievskiysv@gmail.com>
Sat, 12 Oct 2024 10:57:43 +0000 (13:57 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 22 Oct 2024 13:40:46 +0000 (15:40 +0200)
commit655f5d4662b958122b260be05aa6dfdf8768efe6
treea93a9f05834789f4fba199c19a12af7a9a6aa44a
parentb6400eb0b347821efc57760221f8fb6d63b9548a
pinctrl: ocelot: fix system hang on level based interrupts

commit 93b8ddc54507a227087c60a0013ed833b6ae7d3c upstream.

The current implementation only calls chained_irq_enter() and
chained_irq_exit() if it detects pending interrupts.

```
for (i = 0; i < info->stride; i++) {
uregmap_read(info->map, id_reg + 4 * i, &reg);
if (!reg)
continue;

chained_irq_enter(parent_chip, desc);
```

However, in case of GPIO pin configured in level mode and the parent
controller configured in edge mode, GPIO interrupt might be lowered by the
hardware. In the result, if the interrupt is short enough, the parent
interrupt is still pending while the GPIO interrupt is cleared;
chained_irq_enter() never gets called and the system hangs trying to
service the parent interrupt.

Moving chained_irq_enter() and chained_irq_exit() outside the for loop
ensures that they are called even when GPIO interrupt is lowered by the
hardware.

The similar code with chained_irq_enter() / chained_irq_exit() functions
wrapping interrupt checking loop may be found in many other drivers:
```
grep -r -A 10 chained_irq_enter drivers/pinctrl
```

Cc: stable@vger.kernel.org
Signed-off-by: Sergey Matsievskiy <matsievskiysv@gmail.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/20241012105743.12450-2-matsievskiysv@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/pinctrl/pinctrl-ocelot.c