aarch64: Relaxed SEL combiner patterns for unpacked SVE FP conversions

aarch64: Relaxed SEL combiner patterns for unpacked SVE FP conversions

Add UNSPEC_SEL combiner patterns for unpacked FP conversions, where the
strictness value is SVE_RELAXED_GP.

gcc/ChangeLog:

	* config/aarch64/aarch64-sve.md
	(*cond_<optab>_nontrunc<SVE_PARTIAL_F:mode><SVE_HSDI:mode>_relaxed):
	New FCVT/SEL combiner pattern.
	(*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx2SI_ONLY:mode>_relaxed):
	New FCVTZ{S,U}/SEL combiner pattern.
	(*cond_<optab>_nonextend<SVE_HSDI:mode><SVE_PARTIAL_F:mode>_relaxed):
	New {S,U}CVTF/SEL combiner pattern.
	(*cond_<optab>_trunc<SVE_SDF:mode><SVE_PARTIAL_HSF:mode>):
	New FCVT/SEL combiner pattern.
	(*cond_<optab>_nontrunc<SVE_PARTIAL_HSF:mode><SVE_SDF:mode>_relaxed):
	New FCVTZ{S,U}/SEL combiner pattern.
	* config/aarch64/iterators.md: New mode iterator for VNx2SI.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/sve/unpacked_cond_cvtf_1.c: New test.
	* gcc.target/aarch64/sve/unpacked_cond_fcvt_1.c: Likewise.
	* gcc.target/aarch64/sve/unpacked_cond_fcvtz_1.c: Likewise.