]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
perf/x86/amd: Support PERF_PMU_CAP_MEDIATED_VPMU for AMD host
authorSandipan Das <sandipan.das@amd.com>
Sat, 6 Dec 2025 00:16:49 +0000 (16:16 -0800)
committerPeter Zijlstra <peterz@infradead.org>
Wed, 17 Dec 2025 12:31:07 +0000 (13:31 +0100)
commit65eb3a9a8a34fa9188e0ab5e657d84ce4fa242a7
treeb8c9f649a3a2ed19a12edd94623cb16ce1d7e4c1
parent4280d79587a3fd4bf9415705536fe385467c5f44
perf/x86/amd: Support PERF_PMU_CAP_MEDIATED_VPMU for AMD host

Apply the PERF_PMU_CAP_MEDIATED_VPMU flag for version 2 and later
implementations of the core PMU. Aside from having Global Control and
Status registers, virtualizing the PMU using the mediated model requires
an interface to set or clear the overflow bits in the Global Status MSRs
while restoring or saving the PMU context of a vCPU.

PerfMonV2-capable hardware has additional MSRs for this purpose, namely
PerfCntrGlobalStatusSet and PerfCntrGlobalStatusClr, thereby making it
suitable for use with mediated vPMU.

Signed-off-by: Sandipan Das <sandipan.das@amd.com>
Signed-off-by: Mingwei Zhang <mizhang@google.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Xudong Hao <xudong.hao@intel.com>
Link: https://patch.msgid.link/20251206001720.468579-14-seanjc@google.com
arch/x86/events/amd/core.c