[PATCH] RISC-V: Add missing insn types for XiangShan Nanhu scheduler model

[PATCH] RISC-V: Add missing insn types for XiangShan Nanhu scheduler model

This patch aims to add the missing instruction types to the XiangShan-Nanhu scheduler model.

The current XiangShan -Nanhu model lacks the trap, atomic trap, fcvt_i2f, and fcvt_f2i instructions.

The trap, atomic, and i2f instructions belong to xs_jmp_rs. [1]

The f2i instruction belongs to xs_fmisc_rs.[2]

[1]
https://github.com/OpenXiangShan/XiangShan/blob/v2.0/src/main/scala/xiangshan/package.scala#L780

[2]
https://github.com/OpenXiangShan/XiangShan/blob/v2.0/src/main/scala/xiangshan/backend/decode/DecodeUnit.scala#L290

gcc/ChangeLog:

	* config/riscv/xiangshan.md: Add atomic, trap, fcvt_i2f, fcvt_f2i.