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(parent: 440f4f4) | patch
clk: versal: Add clock driver support
authorSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Sun, 23 Jun 2019 06:54:57 +0000 (12:24 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Fri, 28 Jun 2019 09:25:30 +0000 (11:25 +0200)
commit686a2791b62fc36cad894c7fc56e61958e2b0769
treeab82edd1ed5dc60b0e9e6623ca43009454894aeetree
parent440f4f44eb5b4346f9a64e4fbb0583a54403c455commit | diff
clk: versal: Add clock driver support

This patch adds clock driver support for Versal
platform. The clock driver queries and performs
clock operations using PLM firmware by communicating
with it using SMC calls.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/clk/Kconfig diff | blob | blame | history
drivers/clk/Makefile diff | blob | blame | history
drivers/clk/clk_versal.c [new file with mode: 0644] blob
drivers/firmware/firmware-zynqmp.c diff | blob | blame | history
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