]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
drm/i915/dp: Ensure the FEC state stays disabled for UHBR links
authorImre Deak <imre.deak@intel.com>
Wed, 15 Oct 2025 16:19:29 +0000 (19:19 +0300)
committerImre Deak <imre.deak@intel.com>
Fri, 17 Oct 2025 18:48:27 +0000 (21:48 +0300)
commit69df31263bcabc527a5b526fb8972cb080a179b3
treecd29b43c7542342b8e0abcde94c7a2de75da1923
parentc88e70dc8bfca9a2be74a100387b1b66de973128
drm/i915/dp: Ensure the FEC state stays disabled for UHBR links

Atm, in the DP SST case the FEC state is computed before
intel_crtc_state::port_clock is initialized, hence intel_dp_is_uhbr()
will always return false and the FEC state will be always computed
assuming a non-UHBR link.

This happens to work, since the FEC state is recomputed later in
intel_dp_mtp_tu_compute_config(), where port_clock will be set already,
so intel_crtc_state::fec_enable will be reset as expected for UHBR. This
also depends on link rates being tried in an increasing order (i.e. from
non-UHBR -> UHBR link rates) in dsc_compute_link_config(), thus
intel_crtc_state::fec_enable being set for the non-UHBR rates and
getting reset for the first UHBR rate as expected.

A follow-up change will reuse intel_dp_fec_compute_config() for the DP
MST state computation, prepare for that here, making sure that the
function determines the correct intel_crtc_state::fec_enable=false state
for UHBR link rates based on the above.

The DP SST and MST state computation should be further unified to avoid
computing/setting the intel_crtc_state::fec_enable state multiple times,
but that's left for a follow-up change. For now add only code comments
about this.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20251015161934.262108-3-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_dp.c
drivers/gpu/drm/i915/display/intel_dp_mst.c