]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
pinctrl: armada-37xx: Correct PWM pins definitions
authorMarek Behún <kabel@kernel.org>
Wed, 24 Nov 2021 23:04:58 +0000 (00:04 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 1 Dec 2021 08:27:41 +0000 (09:27 +0100)
commit72168c3cce9bbb02e955854880636f6ec50e1cda
tree8b76af7d9a89604c386ff8d478d46e155465b484
parent44d9715fda1f6cd2e06a260edff40138850e94cd
pinctrl: armada-37xx: Correct PWM pins definitions

commit baf8d6899b1e8906dc076ef26cc633e96a8bb0c3 upstream.

The PWM pins on North Bridge on Armada 37xx can be configured into PWM
or GPIO functions. When in PWM function, each pin can also be configured
to drive low on 0 and tri-state on 1 (LED mode).

The current definitions handle this by declaring two pin groups for each
pin:
- group "pwmN" with functions "pwm" and "gpio"
- group "ledN_od" ("od" for open drain) with functions "led" and "gpio"

This is semantically incorrect. The correct definition for each pin
should be one group with three functions: "pwm", "led" and "gpio".

Change the "pwmN" groups to support "led" function.

Remove "ledN_od" groups. This cannot break backwards compatibility with
older device trees: no device tree uses it since there is no PWM driver
for this SOC yet. Also "ledN_od" groups are not even documented.

Fixes: b835d6953009 ("pinctrl: armada-37xx: swap polarity on LED group")
Signed-off-by: Marek Behún <kabel@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210719112938.27594-1-kabel@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c