]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
drm/i915/dp: Align min/max DSC input BPPs to sink caps
authorImre Deak <imre.deak@intel.com>
Mon, 22 Dec 2025 15:35:32 +0000 (17:35 +0200)
committerImre Deak <imre.deak@intel.com>
Tue, 13 Jan 2026 16:42:13 +0000 (18:42 +0200)
commit753d6b404e12ac950a6b9207ba788f7f2e0a6303
treec5bc8542d18c839580721d645b8493e5fc8f2ab0
parent44a95ffe685d3b9428ab81f632e9b34bb2e4641c
drm/i915/dp: Align min/max DSC input BPPs to sink caps

Align the minimum/maximum DSC input BPPs to the corresponding sink DSC
input BPP capability limits already when computing the BPP limits. This
alignment is also performed later during state computation, however
there is no reason to initialize the limits to an unaligned/incorrect
value.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20251222153547.713360-6-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_dp.c