]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
drm/msm/dpu: fix WD timer handling on DPU 8.x
authorDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Tue, 30 Dec 2025 07:17:57 +0000 (09:17 +0200)
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Tue, 6 Jan 2026 03:23:01 +0000 (05:23 +0200)
commit794b0e68caba49b950b42ec32e364028c2facf57
treea62f32b83cb9ad56c95215ce4154e2d0c4251674
parent1ad9880f059c9b0943e53714f9a59924cb035bbb
drm/msm/dpu: fix WD timer handling on DPU 8.x

Since DPU 8.x Watchdog timer settings were moved from the TOP to the
INTF block. Support programming the timer in the INTF block. Fixes tag
points to the commit which removed register access to those registers on
DPU 8.x+ (and which also should have added proper support for WD timer
on those devices).

Fixes: 43e3293fc614 ("drm/msm/dpu: add support for MDP_TOP blackhole")
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/696586/
Link: https://lore.kernel.org/r/20251230-intf-fix-wd-v6-2-98203d150611@oss.qualcomm.com
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h