]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
riscv: Add usercfi state for task and save/restore of CSR_SSP on trap entry/exit
authorDeepak Gupta <debug@rivosinc.com>
Mon, 26 Jan 2026 04:09:53 +0000 (21:09 -0700)
committerPaul Walmsley <pjw@kernel.org>
Mon, 26 Jan 2026 04:09:53 +0000 (21:09 -0700)
commit79dd4f2f40d0414aab670c46b801b11850306448
treedd5463e7d85832c77d99b7dd9955e6185dd9cfac
parent41a2452c99f327f2b57811e63f6d2497a4a96a9f
riscv: Add usercfi state for task and save/restore of CSR_SSP on trap entry/exit

Carve out space in the RISC-V architecture-specific thread struct for
cfi status and shadow stack in usermode.

This patch:
- defines a new structure cfi_status with status bit for cfi feature
- defines shadow stack pointer, base and size in cfi_status structure
- defines offsets to new member fields in thread in asm-offsets.c
- saves and restores shadow stack pointer on trap entry (U --> S) and exit
  (S --> U)

Shadow stack save/restore is gated on feature availability and is
implemented using alternatives. CSR_SSP can be context-switched in
'switch_to' as well, but as soon as kernel shadow stack support gets
rolled in, the shadow stack pointer will need to be switched at trap
entry/exit point (much like 'sp'). It can be argued that a kernel
using a shadow stack deployment scenario may not be as prevalent as
user mode using this feature. But even if there is some minimal
deployment of kernel shadow stack, that means that it needs to be
supported.  Thus save/restore of shadow stack pointer is implemented
in entry.S instead of in 'switch_to.h'.

Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Tested-by: Andreas Korb <andreas.korb@aisec.fraunhofer.de> # QEMU, custom CVA6
Tested-by: Valentin Haudiquet <valentin.haudiquet@canonical.com>
Link: https://patch.msgid.link/20251112-v5_user_cfi_series-v23-5-b55691eacf4f@rivosinc.com
[pjw@kernel.org: cleaned up patch description]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
arch/riscv/include/asm/processor.h
arch/riscv/include/asm/thread_info.h
arch/riscv/include/asm/usercfi.h [new file with mode: 0644]
arch/riscv/kernel/asm-offsets.c
arch/riscv/kernel/entry.S