RISC-V: Fix ICE of RTL CHECK on VSETVL PASS[PR111947]

RISC-V: Fix ICE of RTL CHECK on VSETVL PASS[PR111947]

ICE on vsetvli a5, 8 instruction demand info.

The AVL is const_int 8 which ICE on RENGO caller.

Committed as it is obvious fix.

	PR target/111947

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Add REGNO check.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/vsetvl/pr111947.c: New test.