]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
drm/amd/display: Ammend DCPG IP control sequences to align with HW guidance
authorDillon Varone <dillon.varone@amd.com>
Tue, 14 Jan 2025 17:14:26 +0000 (12:14 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 29 May 2025 09:13:27 +0000 (11:13 +0200)
commit7cebaed5cb8683d5f801fb5d989841cbe28b69fd
treef54914bdf3fcabdabd8acba7891493ea2832ece2
parent18a39910fc8517ede63d50c878b9d00c5de68f43
drm/amd/display: Ammend DCPG IP control sequences to align with HW guidance

[ Upstream commit cbd97d621ece1d92c3542e52f8af7c04cd2c6afb ]

[WHY&HOW]
IP_REQUEST_CNTL should only be toggled off when it was originally, never
unconditionally.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c