]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
drm/i915/reg: separate VLV_DSPCLK_GATE_D from DSPCLK_GATE_D
authorJani Nikula <jani.nikula@intel.com>
Wed, 6 Aug 2025 16:55:15 +0000 (19:55 +0300)
committerJani Nikula <jani.nikula@intel.com>
Thu, 14 Aug 2025 10:12:23 +0000 (13:12 +0300)
commit7e757092373ccf147e23f46d1167718680db8ec6
tree50f78370ade79e464b13dfa337bcb63b935da6c8
parent85cac9ff650dd6d20d7589c1577aeaa7ef62d944
drm/i915/reg: separate VLV_DSPCLK_GATE_D from DSPCLK_GATE_D

All the places that use DSPCLK_GATE_D are specific to certain platforms,
and the parametrization of it to support VLV/CHV MMIO display base isn't
really buying us anything. Add a separate macro for VLV_DSPCLK_GATE_D
and use it.

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/ac16d9d5192595944bf9bcf70aa721b504bc90c0.1754499175.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_display_power_well.c
drivers/gpu/drm/i915/display/intel_gmbus.c
drivers/gpu/drm/i915/display/intel_overlay.c
drivers/gpu/drm/i915/display/vlv_dsi.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_clock_gating.c