]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh
authorClaudiu Beznea <claudiu.beznea@microchip.com>
Fri, 26 Aug 2022 08:39:21 +0000 (11:39 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 15 Sep 2022 08:47:14 +0000 (10:47 +0200)
commit7efca37d3178cbafd2d052135255f53c83924f31
tree14c1516abe2ac59f5e65a60ad72c6134a8409b34
parent86f07e220b8d439f221a9e7d0f95569c94051102
ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh

[ Upstream commit 7a94b83a7dc551607b6c4400df29151e6a951f07 ]

On SAMA7G5, when resuming from backup and self-refresh, the bootloader
performs DDR PHY recalibration by restoring the value of ZQ0SR0 (stored
in RAM by Linux before going to backup and self-refresh). It has been
discovered that the current procedure doesn't work for all possible values
that might go to ZQ0SR0 due to hardware bug. The workaround to this is to
avoid storing some values in ZQ0SR0. Thus Linux will read the ZQ0SR0
register and cache its value in RAM after processing it (using
modified_gray_code array). The bootloader will restore the processed value.

Fixes: d2d4716d8384 ("ARM: at91: pm: save ddr phy calibration data to securam")
Suggested-by: Frederic Schumacher <frederic.schumacher@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-4-claudiu.beznea@microchip.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/mach-at91/pm.c
include/soc/at91/sama7-ddr.h