]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
cxl/pci: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from core...
authorDave Jiang <dave.jiang@intel.com>
Wed, 14 Jan 2026 18:20:28 +0000 (12:20 -0600)
committerDave Jiang <dave.jiang@intel.com>
Thu, 22 Jan 2026 21:58:03 +0000 (14:58 -0700)
commit7ff8b1d60881c5f97b5ae426e14d2822917d3b69
tree4881244399a0d6e70d045cd5a823453c3b6c30fb
parentbcfa289932a703dd189466ea5947212e8dddd399
cxl/pci: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from core/pci.c

Create new config CONFIG_CXL_RAS and put all CXL RAS items behind the
config. The config will depend on CPER and PCIE AER to build. Move the
related VH RAS code from core/pci.c to core/ras.c.

Restricted CXL host (RCH) RAS functions will be moved in a future patch.

Cc: Robert Richter <rrichter@amd.com>
Reviewed-by: Joshua Hahn <joshua.hahnjy@gmail.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Co-developed-by: Terry Bowman <terry.bowman@amd.com>
Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Link: https://patch.msgid.link/20260114182055.46029-8-terry.bowman@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
drivers/cxl/Kconfig
drivers/cxl/core/Makefile
drivers/cxl/core/core.h
drivers/cxl/core/pci.c
drivers/cxl/core/ras.c
drivers/cxl/cxl.h
drivers/cxl/cxlpci.h
tools/testing/cxl/Kbuild