]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode
authorRobert Marko <robert.marko@sartura.hr>
Wed, 17 Nov 2021 14:02:22 +0000 (15:02 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 29 Dec 2021 11:20:43 +0000 (12:20 +0100)
commit8044451ac443b71a5ef4a332221556e5a1b5169e
tree1a621d099aa30c9ac50aaef4bb92b01c827299c2
parent6ccda28dff03db196b2122566765d03737fea6b2
arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode

[ Upstream commit 08d2061ff9c5319a07bf9ca6bbf11fdec68f704a ]

Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its
currently set to plain RGMII mode meaning that it doesn't introduce
delays.

With this setup, TX packets are completely lost and changing the mode to
RGMII-ID so the PHY will add delays internally fixes the issue.

Fixes: a7affb13b271 ("arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus")
Acked-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Ron Goossens <rgoossens@gmail.com>
Tested-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211117140222.43692-1-robert.marko@sartura.hr
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts