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riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC
authorInochi Amaoto <inochiama@gmail.com>
Tue, 17 Jun 2025 07:01:42 +0000 (15:01 +0800)
committerInochi Amaoto <inochiama@gmail.com>
Wed, 23 Jul 2025 01:55:14 +0000 (09:55 +0800)
commit817c89a6b5c0df6e018857e1e540d86d38779d24
tree6ed5de06be5d70b7111bb72d630f1b5e9cd69014tree
parentf5742f67a47cc1bd44368706d41bb2657f8e487dcommit | diff
riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC

Add known reset configuration for existed device.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250617070144.1149926-5-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
arch/riscv/boot/dts/sophgo/cv180x.dtsi diff | blob | blame | history
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