]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
arm64: dts: ti: k3-j784s4-j742s2-main-common: Add CSI2 interrupts property
authorYemike Abhilash Chandra <y-abhilashchandra@ti.com>
Fri, 8 Aug 2025 09:58:00 +0000 (15:28 +0530)
committerNishanth Menon <nm@ti.com>
Wed, 13 Aug 2025 14:24:48 +0000 (09:24 -0500)
commit84ba1f67c6169e4533aa109888accbbccef25705
tree2ee534e3aa42fd2fd20ba37dbfbc4cf0aedfdf5c
parent33b34bfa4f22216845f5fd738d320e78d75cf1ff
arm64: dts: ti: k3-j784s4-j742s2-main-common: Add CSI2 interrupts property

Add interrupts property for CSI2RX. Interrupt IDs are taken from the
J784S4 TRM [0].

Interrupt Line      | Source Interrupt
--------------------|-------------------------
GIC500SS_SPI_IN_185 | CSI_RX_IF0_CSI_ERR_IRQ_0
GIC500SS_SPI_IN_184 | CSI_RX_IF0_CSI_IRQ_0
GIC500SS_SPI_IN_189 | CSI_RX_IF1_CSI_ERR_IRQ_0
GIC500SS_SPI_IN_188 | CSI_RX_IF1_CSI_IRQ_0
GIC500SS_SPI_IN_193 | CSI_RX_IF2_CSI_ERR_IRQ_0
GIC500SS_SPI_IN_192 | CSI_RX_IF2_CSI_IRQ_0

[0]: https://www.ti.com/lit/zip/spruj52

Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20250808095804.544298-4-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi