]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
mtd: rawnand: qcom: Fix clock sequencing in qcom_nandc_probe()
authorBryan O'Donoghue <bryan.odonoghue@linaro.org>
Mon, 3 Jan 2022 03:03:15 +0000 (03:03 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 23 Feb 2022 10:58:40 +0000 (11:58 +0100)
commit891484112f4ffd0b576e88407bbd3653abf3faba
treecc2485b34c9297cca744c49ad31eb4fc08672269
parentd2ba21f271eb167ac2b0581598e55222b89f0f32
mtd: rawnand: qcom: Fix clock sequencing in qcom_nandc_probe()

commit 5c23b3f965bc9ee696bf2ed4bdc54d339dd9a455 upstream.

Interacting with a NAND chip on an IPQ6018 I found that the qcomsmem NAND
partition parser was returning -EPROBE_DEFER waiting for the main smem
driver to load.

This caused the board to reset. Playing about with the probe() function
shows that the problem lies in the core clock being switched off before the
nandc_unalloc() routine has completed.

If we look at how qcom_nandc_remove() tears down allocated resources we see
the expected order is

qcom_nandc_unalloc(nandc);

clk_disable_unprepare(nandc->aon_clk);
clk_disable_unprepare(nandc->core_clk);

dma_unmap_resource(&pdev->dev, nandc->base_dma, resource_size(res),
   DMA_BIDIRECTIONAL, 0);

Tweaking probe() to both bring up and tear-down in that order removes the
reset if we end up deferring elsewhere.

Fixes: c76b78d8ec05 ("mtd: nand: Qualcomm NAND controller driver")
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220103030316.58301-2-bryan.odonoghue@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/mtd/nand/raw/qcom_nandc.c