]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
drm/i915/dram: Sort SKL+ DIMM register bits
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 29 Oct 2025 20:42:14 +0000 (22:42 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 19 Nov 2025 16:55:04 +0000 (18:55 +0200)
commit8c171a9b8c4cb10b1942d3094f94e27c65232cf7
tree0c4db1b1a7472a6c96ee426361b2bf484c650a6e
parent5b23aa423a637358a4b98cd18a4da020ca8398bc
drm/i915/dram: Sort SKL+ DIMM register bits

Use the customary big endian order when defining the
SKL/ICL DIMM registers.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251029204215.12292-3-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
drivers/gpu/drm/i915/intel_mchbar_regs.h