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(parent: aead5ae) | patch
spi: rzv2h-rspi: make FIFO size chip-specific
authorCosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Wed, 19 Nov 2025 16:14:23 +0000 (18:14 +0200)
committerMark Brown <broonie@kernel.org>
Mon, 24 Nov 2025 14:10:40 +0000 (14:10 +0000)
commit8e89ee6cd2b928a8431bef61e8b851ce5df1ecb0
treec1cd307d03aa48da78a2f45644ce7fd8e38cefe2tree | snapshot
parentaead5ae91e4cbadac817d15737eca3b531237448commit | diff
spi: rzv2h-rspi: make FIFO size chip-specific

The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have a
different FIFO size compared to RZ/V2H. Add a chip-specific structure,
and set the FIFO size inside it, to prepare for adding support for them.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Link: https://patch.msgid.link/20251119161434.595677-3-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-rzv2h-rspi.c diff | blob | blame | history
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