RISC-V: Add testcases for unsigned vector .SAT_TRUNC form 4

RISC-V: Add testcases for unsigned vector .SAT_TRUNC form 4

This patch would like to add test cases for the unsigned vector
.SAT_TRUNC form 4.  Aka:

Form 4:
  #define DEF_VEC_SAT_U_TRUNC_FMT_4(NT, WT)                             \
  void __attribute__((noinline))                                        \
  vec_sat_u_trunc_##NT##_##WT##_fmt_4 (NT *out, WT *in, unsigned limit) \
  {                                                                     \
    unsigned i;                                                         \
    for (i = 0; i < limit; i++)                                         \
      {                                                                 \
        bool not_overflow = in[i] <= (WT)(NT)(-1);                      \
        out[i] = ((NT)in[i]) | (NT)((NT)not_overflow - 1);              \
      }                                                                 \
  }

DEF_VEC_SAT_U_TRUNC_FMT_4 (uint32_t, uint64_t)

The below test is passed for this patch.
* The rv64gcv regression test.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vec_sat_arith.h: Add test helper macros.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-19.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-20.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-21.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-22.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-23.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-24.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-19.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-20.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-21.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-22.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-23.c: New test.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-24.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>