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target/arm: Added test case for SME register exposure to GDB
authorVacha Bhavsar <vacha.bhavsar@oss.qualcomm.com>
Tue, 9 Sep 2025 16:10:12 +0000 (16:10 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 16 Sep 2025 16:31:54 +0000 (17:31 +0100)
commit904b8aae52a7b23fa00285decba535bd1e8f8d50
tree5a3810f8fa37b4e7e1f2971ab50a9c9f5435040atree
parent030f0ba11767c7bd4148d9cd4f63e299d38139b3commit | diff
target/arm: Added test case for SME register exposure to GDB

This patch adds a test case to test SME register exposure to
a remote gdb debugging session. This test simply sets and
reads SME registers.

Signed-off-by: Vacha Bhavsar <vacha.bhavsar@oss.qualcomm.com>
Message-id: 20250909161012.2561593-4-vacha.bhavsar@oss.qualcomm.com
[PMM: fixed various python formatting nits]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
configure diff | blob | blame | history
tests/tcg/aarch64/Makefile.target diff | blob | blame | history
tests/tcg/aarch64/gdbstub/test-sme.py [new file with mode: 0644] blob
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