]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
ARM: dts: socfpga: add Enclustra SoM dts files
authorLothar Rubusch <l.rubusch@gmail.com>
Sat, 18 Oct 2025 12:11:55 +0000 (12:11 +0000)
committerDinh Nguyen <dinguyen@kernel.org>
Mon, 20 Oct 2025 16:26:34 +0000 (11:26 -0500)
commit91b97ca3d46c4f9080225c4fa6d92c05c62a8326
treeafc99700a616877d845a86bd15af9e806ede5e39
parent558417387bc76fc4baec5c540bc734eacb684800
ARM: dts: socfpga: add Enclustra SoM dts files

Add the approach to set up a combination of Enclustra's SoM on a carrier
board and corresponding boot-mode as single device-tree target.

Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
25 files changed:
arch/arm/boot/dts/intel/socfpga/Makefile
arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_emmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_qspi.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_sdmmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_emmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_qspi.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_sdmmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_emmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_qspi.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_sdmmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_emmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_qspi.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_emmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_qspi.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_sdmmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_emmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_qspi.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_sdmmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_qspi.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_sdmmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_qspi.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_sdmmc.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_qspi.dts [new file with mode: 0644]
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_sdmmc.dts [new file with mode: 0644]