]> git.ipfire.org Git - thirdparty/gcc.git/commit
[PATCH][PR target/122942] RISC-V: Add zifencei extension to the rva23s64 and rvb23s64...
authorPeter Bergner <bergner@tenstorrent.com>
Mon, 1 Dec 2025 23:03:44 +0000 (16:03 -0700)
committerJeff Law <jlaw@ventanamicro.com>
Mon, 1 Dec 2025 23:03:44 +0000 (16:03 -0700)
commit976be4e0148b614fccb60c85e5b3bc96e0bb26b6
tree305ba06152b5436d82d6cb0f1f070f31c2719c32
parenta0456f1b7176e1f5174a6a25e2a14a63baa9af72
[PATCH][PR target/122942] RISC-V: Add zifencei extension to the rva23s64 and rvb23s64 profiles [PR122942]

While verifying our Ascalon extensions list was complete (it isn't, follow-on
patch coming), I noticed that the rva23s64 and rvb23s64 profiles were missing
the mandatory zifencei extension, hence the following patch.

This was bootstrapped and regtested with no regressions.
Ok for trunk?

Peter

The RVA23S64 and RVB23S64 profiles both state that zifencei is a mandatory
extension.  Add it to both profiles.

gcc/
PR target/122942
* config/riscv/riscv-profiles.def (rva23s64): Add zifencei.
(rvb23s64): Likewise.
gcc/config/riscv/riscv-profiles.def