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LoongArch: Ensure sp 16-byte aligned for tlsdesc
authorXi Ruoyao <xry111@xry111.site>
Thu, 13 Jun 2024 11:04:05 +0000 (19:04 +0800)
committercaiyinyu <caiyinyu@loongson.cn>
Fri, 14 Jun 2024 02:14:54 +0000 (10:14 +0800)
commit97aa7b7346bb9f1807e450c889fccbd2a7d8ff49
tree1ff3164154544026329c681a2743a0a7aaa85799tree
parent868ab8923a2ec977faafec97ecafac0c3159c1b2commit | diff
LoongArch: Ensure sp 16-byte aligned for tlsdesc

"ADDI sp, sp, 24" and "ADDI sp, sp, SZFCSREG" (SZFCSREG = 4) are
misaligning the stack: the ABI mandates a 16-byte alignment.  Fix it
by changing the first one to "ADDI sp, sp, 32", and reuse the spare 4th
slot for saving fcsr.

Reported-by: Jinyang He <hejinyang@loongson.cn>
Signed-off-by: Xi Ruoyao <xry111@xry111.site>
sysdeps/loongarch/dl-tlsdesc.S diff | blob | blame | history
sysdeps/loongarch/sys/asm.h diff | blob | blame | history
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