[RS6000] PowerPC64 soft-float

[RS6000] PowerPC64 soft-float

This patch aims to prevent long sequences loading soft-float
constants.  For 32-bit, it makes sense to load values inline to a gpr
with lis, addi, but not so much for 64-bit where a 5 insn sequence
might be needed for each gpr.  For TFmode in particular, a 10 insn
sequence is reduced to 2 loads from memory plus 1 or 2 address setup
insns.

	* config/rs6000/predicates.md (easy_fp_constant): Avoid long
	dependent insn sequences.
	* config/rs6000/rs6000.c (num_insns_constant): Support long
	double constants.
	* config/rs6000/rs6000.md (mov<mode>_softfloat <FMOVE128>): Adjust
	length attribute.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@266663 138bc75d-0d04-0410-961f-82ee72b054a4