]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
x86/cacheinfo: Validate CPUID leaf 0x2 EDX output
authorAhmed S. Darwish <darwi@linutronix.de>
Tue, 4 Mar 2025 08:51:12 +0000 (09:51 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 13 Mar 2025 12:01:54 +0000 (13:01 +0100)
commit9f89384087c356cec2ba90ef69d5c65cb1bc7fff
tree2e5d0cad06c86f5b6bbdff4f5406faec2cd8597f
parentebed28c4208a2deccc3b69296879cd52986ed7dd
x86/cacheinfo: Validate CPUID leaf 0x2 EDX output

commit 8177c6bedb7013cf736137da586cf783922309dd upstream.

CPUID leaf 0x2 emits one-byte descriptors in its four output registers
EAX, EBX, ECX, and EDX.  For these descriptors to be valid, the most
significant bit (MSB) of each register must be clear.

The historical Git commit:

  019361a20f016 ("- pre6: Intel: start to add Pentium IV specific stuff (128-byte cacheline etc)...")

introduced leaf 0x2 output parsing.  It only validated the MSBs of EAX,
EBX, and ECX, but left EDX unchecked.

Validate EDX's most-significant bit.

Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: stable@vger.kernel.org
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: https://lore.kernel.org/r/20250304085152.51092-2-darwi@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/kernel/cpu/cacheinfo.c