]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
x86/cpu/AMD: Use LFENCE_RDTSC in preference to MFENCE_RDTSC
authorTom Lendacky <thomas.lendacky@amd.com>
Mon, 8 Jan 2018 22:09:32 +0000 (16:09 -0600)
committerSasha Levin <alexander.levin@microsoft.com>
Sun, 20 May 2018 03:15:41 +0000 (23:15 -0400)
commita15890b158572a35a1d4767775ff3adad02b51f7
treee17f58fd549fd3e1988f5c4784e3856a4d171e9f
parent52b806881169a7979b281a584570a4a2972d8822
x86/cpu/AMD: Use LFENCE_RDTSC in preference to MFENCE_RDTSC

[ Upstream commit 9c6a73c75864ad9fa49e5fa6513e4c4071c0e29f ]

With LFENCE now a serializing instruction, use LFENCE_RDTSC in preference
to MFENCE_RDTSC.  However, since the kernel could be running under a
hypervisor that does not support writing that MSR, read the MSR back and
verify that the bit has been set successfully.  If the MSR can be read
and the bit is set, then set the LFENCE_RDTSC feature, otherwise set the
MFENCE_RDTSC feature.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Tim Chen <tim.c.chen@linux.intel.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Greg Kroah-Hartman <gregkh@linux-foundation.org>
Cc: David Woodhouse <dwmw@amazon.co.uk>
Cc: Paul Turner <pjt@google.com>
Link: https://lkml.kernel.org/r/20180108220932.12580.52458.stgit@tlendack-t1.amdoffice.net
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
arch/x86/include/uapi/asm/msr-index.h
arch/x86/kernel/cpu/amd.c