RISC-V: Implement the quad and oct .SAT_TRUNC for scalar

RISC-V: Implement the quad and oct .SAT_TRUNC for scalar

This patch would like to implement the quad and oct .SAT_TRUNC pattern
in the riscv backend. Aka:

Form 1:
  #define DEF_SAT_U_TRUC_FMT_1(NT, WT)     \
  NT __attribute__((noinline))             \
  sat_u_truc_##WT##_to_##NT##_fmt_1 (WT x) \
  {                                        \
    bool overflow = x > (WT)(NT)(-1);      \
    return ((NT)x) | (NT)-overflow;        \
  }

DEF_SAT_U_TRUC_FMT_1(uint16_t, uint64_t)

Before this patch:
   4   │ __attribute__((noinline))
   5   │ uint16_t sat_u_truc_uint64_t_to_uint16_t_fmt_1 (uint64_t x)
   6   │ {
   7   │   _Bool overflow;
   8   │   short unsigned int _1;
   9   │   short unsigned int _2;
  10   │   short unsigned int _3;
  11   │   uint16_t _6;
  12   │
  13   │ ;;   basic block 2, loop depth 0
  14   │ ;;    pred:       ENTRY
  15   │   overflow_5 = x_4(D) > 65535;
  16   │   _1 = (short unsigned int) x_4(D);
  17   │   _2 = (short unsigned int) overflow_5;
  18   │   _3 = -_2;
  19   │   _6 = _1 | _3;
  20   │   return _6;
  21   │ ;;    succ:       EXIT
  22   │
  23   │ }

After this patch:
   3   │
   4   │ __attribute__((noinline))
   5   │ uint16_t sat_u_truc_uint64_t_to_uint16_t_fmt_1 (uint64_t x)
   6   │ {
   7   │   uint16_t _6;
   8   │
   9   │ ;;   basic block 2, loop depth 0
  10   │ ;;    pred:       ENTRY
  11   │   _6 = .SAT_TRUNC (x_4(D)); [tail call]
  12   │   return _6;
  13   │ ;;    succ:       EXIT
  14   │
  15   │ }

The below tests suites are passed for this patch
1. The rv64gcv fully regression test.
2. The rv64gcv build with glibc

gcc/ChangeLog:

	* config/riscv/iterators.md (ANYI_QUAD_TRUNC): New iterator for
	quad truncation.
	(ANYI_OCT_TRUNC): New iterator for oct truncation.
	(ANYI_QUAD_TRUNCATED): New attr for truncated quad modes.
	(ANYI_OCT_TRUNCATED): New attr for truncated oct modes.
	(anyi_quad_truncated): Ditto but for lower case.
	(anyi_oct_truncated): Ditto but for lower case.
	* config/riscv/riscv.md (ustrunc<mode><anyi_quad_truncated>2):
	Add new pattern for quad truncation.
	(ustrunc<mode><anyi_oct_truncated>2): Ditto but for oct.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-2.c: Adjust
	the expand dump check times.
	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-3.c: Ditto.
	* gcc.target/riscv/sat_arith_data.h: Add test helper macros.
	* gcc.target/riscv/sat_u_trunc-4.c: New test.
	* gcc.target/riscv/sat_u_trunc-5.c: New test.
	* gcc.target/riscv/sat_u_trunc-6.c: New test.
	* gcc.target/riscv/sat_u_trunc-run-4.c: New test.
	* gcc.target/riscv/sat_u_trunc-run-5.c: New test.
	* gcc.target/riscv/sat_u_trunc-run-6.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>