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fpga: zynqpl: Check fpga config completion
authorT Karthik Reddy <t.karthik.reddy@xilinx.com>
Tue, 12 Mar 2019 14:50:20 +0000 (20:20 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 13 Mar 2019 14:19:21 +0000 (15:19 +0100)
commita3d1bdb13705a446ecbb1dc49bed7bdf6e6f49b7
treef79e55d0389a9d84b1b29e041a6ad16467eb5821tree
parent8658eadb39c5b6ed9fa1669bc14473655b88b285commit | diff
fpga: zynqpl: Check fpga config completion

This patch checks fpga config completion when a bitstream is loaded
into PL.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/fpga/zynqpl.c diff | blob | blame | history
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