]> git.ipfire.org Git - thirdparty/linux.git/commit
drm: renesas: rz-du: mipi_dsi: Add feature flag for 16BPP support
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Mon, 9 Jun 2025 22:56:28 +0000 (23:56 +0100)
committerBiju Das <biju.das.jz@bp.renesas.com>
Thu, 12 Jun 2025 18:42:28 +0000 (19:42 +0100)
commita56a6b81d80fdf876a5ee6e441a6c8a0052f6f37
treeff53767b936bd1723f458c2c3f0ce906495b5cb3
parent7c3fecdd12d6487e1229f00bfeffccabd1f011f8
drm: renesas: rz-du: mipi_dsi: Add feature flag for 16BPP support

Introduce the `RZ_MIPI_DSI_FEATURE_16BPP` flag in `rzg2l_mipi_dsi_hw_info`
to indicate support for 16BPP pixel formats. The RZ/V2H(P) SoC supports
16BPP, whereas this feature is missing on the RZ/G2L SoC.

Update the `mipi_dsi_host_attach()` function to check this flag before
allowing 16BPP formats. If the SoC does not support 16BPP, return an error
to prevent incorrect format selection.

This change enables finer-grained format support control for different
SoC variants.

Co-developed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20250609225630.502888-8-prabhakar.mahadev-lad.rj@bp.renesas.com
drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c