arm64: dts: apple: Add initial t6020/t6021/t6022 DTs

arm64: dts: apple: Add initial t6020/t6021/t6022 DTs

These SoCs are found in Apple devices with M2 Pro (t6020), M2 Max
(t6021) and M2 Ultra (t6022) and follow the pattern of their M1
counterparts.

t6020 is a cut-down version of t6021, so the former just includes the
latter and disables the missing bits (This is currently just one PMGR
node and all of its domains).

t6022 is two connected t6021 dies. The implementation seems to use
t6021 with blocks disabled (mostly on the second die). MMIO addresses on
the second die have a constant offset. The interrupt controller is
multi-die aware. This setup can be represented in the device tree with
two top level "soc" nodes. The MMIO offset is applied via "ranges" and
devices are included with preproceesor macros to make the node labels
unique and to specify the die number for the interrupt definition.

Device nodes are distributed over dtsi files based on whether they are
present on both dies or just on the first die. The only exception is the
NVMe controller which resides on the second die. Its nodes are in a
separate file.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Co-developed-by: Janne Grunau <j@jannau.net>
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Sven Peter <sven@kernel.org>
Signed-off-by: Sven Peter <sven@kernel.org>