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dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart
authorJunhui Liu <junhui.liu@pigmoral.tech>
Tue, 21 Oct 2025 09:41:43 +0000 (17:41 +0800)
committerConor Dooley <conor.dooley@microchip.com>
Wed, 12 Nov 2025 17:06:56 +0000 (17:06 +0000)
commita94f9be29464f85e97683901162ca236dde40dc7
treebd9bc9192026e746697de4745cb1aeb0c65d3ccetree | snapshot
parentccc3fd3ebeef2686f005733858c0a1b2cb89aaebcommit | diff
dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart

The Anlogic DR1V90 SoC integrates a UART controller compatible with
snps,dw-apb-uart, operating at a 50 MHz clock.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml diff | blob | blame | history
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