Implement a bunch more AVX instructions generated by "gcc-4.7.0 -mavx -O3":

Implement a bunch more AVX instructions generated by "gcc-4.7.0 -mavx -O3":

VPSLLQ  imm8, xmm2, xmm1 = VEX.NDD.128.66.0F.WIG 73 /6 ib
VPEXTRW imm8, xmm1, reg32 = VEX.128.66.0F.W0 C5 /r ib
VPMINUB xmm3/m128, xmm2, xmm1 = VEX.NDS.128.66.0F.WIG DA /r
VPMAXUB xmm3/m128, xmm2, xmm1 = VEX.NDS.128.66.0F.WIG DE /r
VPMINSW r/m, rV, r ::: r = min-signed16s(rV, r/m)
VPMAXSW r/m, rV, r ::: r = max-signed16s(rV, r/m)
VPMULUDQ xmm3/m128, xmm2, xmm1 = VEX.NDS.128.66.0F.WIG F4 /r
VPMINSB r/m, rV, r ::: r = min-signed-8s(rV, r/m)
VPMINUW r/m, rV, r ::: r = min-unsigned-16s(rV, r/m)
VPMINUD r/m, rV, r ::: r = min-unsigned-32s(rV, r/m)
VPMAXSB r/m, rV, r ::: r = max-signed-8s(rV, r/m)
VPMAXUW r/m, rV, r ::: r = max-unsigned-16s(rV, r/m)
VPMAXUD r/m, rV, r ::: r = max-unsigned-32s(rV, r/m)
VPMULLD r/m, rV, r ::: r = mul-32s(rV, r/m)
VPHMINPOSUW xmm2/m128, xmm1 = VEX.128.66.0F38.WIG 41 /r
VPERMILPD imm8, ymm2/m256, ymm1 = VEX.256.66.0F3A.W0 05 /r ib
VPERMILPD imm8, xmm2/m128, xmm1 = VEX.128.66.0F3A.W0 05 /r ib
VPERM2F128 imm8, ymm3/m256, ymm2, ymm1 = VEX.NDS.66.0F3A.W0 06 /r ib
VPEXTRB imm8, xmm2, reg/m8 = VEX.128.66.0F3A.W0 14 /r ib

git-svn-id: svn://svn.valgrind.org/vex/trunk@2380