staging: axis-fifo: Remove unnecessary zero-length packet check
Remove the check for zero-length packets as this condition cannot
occur during normal operation. According to the Xilinx AXI4-Stream
FIFO Product Guide (PG080), in the Receive Length Register (RLR)
description: "The smallest packet that can be received is 1 byte."
A zero-length packet would indicate a bug in the IP core itself.
Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com>
Link: https://patch.msgid.link/20251227212640.3321310-6-ovidiu.panait.oss@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>