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riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10
authorInochi Amaoto <inochiama@gmail.com>
Sun, 13 Apr 2025 22:35:04 +0000 (06:35 +0800)
committerInochi Amaoto <inochiama@gmail.com>
Sun, 18 May 2025 22:23:26 +0000 (06:23 +0800)
commitae5bac370ed40ce09d4d0f35e7149f4dc6ec893f
treeadbe3501fa7776d6501b7422a6755d5387cd85b3tree | snapshot
parent22db96e4abc925596750f10b8b4b9a9fba403970commit | diff
riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10

Sophgo SG2044 SRD3-10 board bases on Sophgo SG2044 SoC.
This board includes 5 uart ports, 5 pcie x8 slots, 1 1G Ethernet port,
1 microSD slot.

Add initial device tree of this board with uart support.

Link: https://lore.kernel.org/r/20250413223507.46480-11-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
arch/riscv/boot/dts/sophgo/Makefile diff | blob | blame | history
arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi [new file with mode: 0644] blob
arch/riscv/boot/dts/sophgo/sg2044-reset.h [new file with mode: 0644] blob
arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts [new file with mode: 0644] blob
arch/riscv/boot/dts/sophgo/sg2044.dtsi [new file with mode: 0644] blob
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