]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
mmc: core: fix multi-bit bus width without high-speed mode
authorAnssi Hannula <anssi.hannula@bitwise.fi>
Mon, 13 Feb 2017 11:46:41 +0000 (13:46 +0200)
committerBen Hutchings <ben@decadent.org.uk>
Thu, 16 Mar 2017 02:27:13 +0000 (02:27 +0000)
commitb08a436e0378c56f2bda17d25026441ed5f12fc6
tree372e031089b9e19b084d45fb936a050536e69d7a
parentdcc9b82603657ddd99da49773917c50505666828
mmc: core: fix multi-bit bus width without high-speed mode

commit 3d4ef329757cfd5e0b23cce97cdeca7e2df89c99 upstream.

Commit 577fb13199b1 ("mmc: rework selection of bus speed mode")
refactored bus width selection code to mmc_select_bus_width().

However, it also altered the behavior to not call the selection code in
non-high-speed modes anymore.

This causes 1-bit mode to always be used when the high-speed mode is not
enabled, even though 4-bit and 8-bit bus are valid bus widths in the
backwards-compatibility (legacy) mode as well (see e.g. 5.3.2 Bus Speed
Modes in JEDEC 84-B50). This results in a significant regression in
transfer speeds.

Fix the code to allow 4-bit and 8-bit widths even without high-speed
mode, as before.

Tested with a Zynq-7000 PicoZed 7020 board.

Fixes: 577fb13199b1 ("mmc: rework selection of bus speed mode")
Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
[bwh: Backported to 3.16: adjust context]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
drivers/mmc/core/mmc.c