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AArch64: Fix SME za register description
authorLuis Machado <luis.machado.foss@gmail.com>
Sat, 11 Oct 2025 10:43:48 +0000 (11:43 +0100)
committerLuis Machado <luis.machado.foss@gmail.com>
Tue, 21 Oct 2025 20:50:06 +0000 (21:50 +0100)
commitb1d1eb8ef5044c331816f0d140f67ea9704963d8
treef602cf5ef003b4c6d80a305346afe2e08e41e036tree
parent37ffcc8891d6f0bc953d9434d4c5ba057f60f369commit | diff
AArch64: Fix SME za register description

Peter Maydell and Vacha Bhavsar pointed out that we have an incorrect
description of the SME za register in the documentation.  It is currently
described as a vector of SVL x SVL bytes, but that is incorrect.

What we really have is a 2-dimensional array of bytes, with each dimension
having size SVL.

Change the documentation to reflect that.

Approved-By: Eli Zaretskii <eliz@gnu.org>
gdb/doc/gdb.texinfo diff | blob | blame | history
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