]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
arm64: dts: rockchip: Add HDMI1 PHY PLL clock source to VOP2 on RK3588
authorCristian Ciocaltea <cristian.ciocaltea@collabora.com>
Sun, 23 Feb 2025 09:31:40 +0000 (11:31 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Thu, 27 Feb 2025 12:02:36 +0000 (13:02 +0100)
commitb2e668a60ed866ba960acb5310d1fb6bf81d154f
treeffab03adcc2f2c0bd20bf26a74357693c250ac02
parentaadaa27956e3430217d9e6b8af5880e39b05b961
arm64: dts: rockchip: Add HDMI1 PHY PLL clock source to VOP2 on RK3588

VOP2 on RK3588 is able to use the HDMI PHY PLL as an alternative and
more accurate pixel clock source to improve handling of display modes up
to 4K@60Hz on video ports 0, 1 and 2.

The HDMI1 PHY PLL clock source cannot be added directly to vop node in
rk3588-base.dtsi, along with the HDMI0 related one, because HDMI1 is an
optional feature and its PHY node belongs to a separate (extra) DT file.

Therefore, add the HDMI1 PHY PLL clock source to VOP2 by overwriting its
clocks & clock-names properties in the extra DT file.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20250223-vop2-hdmi1-disp-modes-v2-4-f4cec5e06fbe@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi