]> git.ipfire.org Git - thirdparty/linux.git/commit
riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores
authorGuodong Xu <guodong@riscstar.com>
Tue, 26 May 2026 19:22:58 +0000 (15:22 -0400)
committerYixun Lan <dlan@kernel.org>
Sat, 30 May 2026 03:49:56 +0000 (03:49 +0000)
commitb4a789799d4c2be03a2c9a4e06f3ea817bb04416
treea38b487ee1fa583b35141cf8bc8acdddede9e603
parentcfe5c91cb73c87f9021e446ec9d323c483851c46
riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores

Add the Ziccrse ISA extension to all eight X100 cores. Ziccrse
provides a forward progress guarantee on LR/SC sequences in main
memory regions with cacheability and coherence PMAs.

The SpacemiT X100 core supports it per the SpacemiT K3 hardware
specification.

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Reviewed-by: Yixun lan <dlan@kernel.org>
Link: https://patch.msgid.link/20260526-k3-ziccrse-v1-1-c759792ca3a3@riscstar.com
Signed-off-by: Yixun Lan <dlan@kernel.org>
arch/riscv/boot/dts/spacemit/k3.dtsi