]> git.ipfire.org Git - thirdparty/qemu.git/commit
fpu: Restrict parts_round_to_int_normal to target precision
authorIlya Leoshkevich <iii@linux.ibm.com>
Tue, 10 Feb 2026 21:39:02 +0000 (22:39 +0100)
committerThomas Huth <thuth@redhat.com>
Thu, 12 Feb 2026 08:40:45 +0000 (09:40 +0100)
commitb4a85d8fe7935cedec51dae65abb780082230ef4
treee578ad017cdf7229f60ec9f5cf21ca4796726d4c
parentf5682b9deef3d572bbe780e04857166b77870718
fpu: Restrict parts_round_to_int_normal to target precision

Currently parts_round_to_int_normal() assumes that its input has just
been unpacked and therefore doesn't expect non-zero fraction bits past
target precision.

The upcoming DIVIDE TO INTEGER use cases needs it to support
calculations on intermediate values that utilize all fraction bits,
while at the same time restricting the result's precision to frac_size.

Delete the "All integral" check, because even though really large
values are always integer, their low fraction bits still need to be
truncated. For the same reason, make sure rnd_mask covers at least
fraction bits past target precision.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20260210214044.1174699-4-iii@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
fpu/softfloat-parts.c.inc