]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
drm/xe/xe_tlb_inval: Modify fence interface to support PPC flush
authorBrian Nguyen <brian3.nguyen@intel.com>
Fri, 12 Dec 2025 21:32:28 +0000 (05:32 +0800)
committerMatthew Brost <matthew.brost@intel.com>
Sat, 13 Dec 2025 00:59:09 +0000 (16:59 -0800)
commitb4abe06d6d82df6521f449357ca6b7c6ce9c0903
tree4ea6cf67b2ea61d70cd5d0e0a6db34970b4b6094
parent44ece22518594ec9ffd9ab8c4c500b522278289e
drm/xe/xe_tlb_inval: Modify fence interface to support PPC flush

Allow tlb_invalidation to control when driver wants to flush the
Private Physical Cache (PPC) as a process of the tlb invalidation
process.

Default behavior is still to always flush the PPC but driver now has the
option to disable it.

v2:
 - Revise commit/kernel doc descriptions. (Shuicheng)
 - Remove unused function. (Shuicheng)
 - Remove bool flush_cache parameter from fence,
   and various function inputs. (Matthew B)

Signed-off-by: Brian Nguyen <brian3.nguyen@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Shuicheng Lin <shuicheng.lin@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patch.msgid.link/20251212213225.3564537-14-brian3.nguyen@intel.com
drivers/gpu/drm/xe/xe_guc_tlb_inval.c