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author	xuli <xuli1@eswincomputing.com>
	Tue, 19 Dec 2023 05:25:10 +0000 (05:25 +0000)
committer	xuli <xuli1@eswincomputing.com>
	Tue, 19 Dec 2023 05:26:09 +0000 (05:26 +0000)
commit	b61e849bd39e55509bc383514a9f4333ea88b3d2
tree	0dc9fe5eaf667cd17bf8c7b2779d00d4107442a2	tree
parent	4759383245ac97a5c83c0272f0a831f2a26ea5c1	commit \| diff

testsuite: Fix dump checks under different riscv-sim for RVV.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/cpymem-1.c: Fix checks under medany.
* gcc.target/riscv/rvv/base/cpymem-strategy-3.c: Fix checks.
* gcc.target/riscv/rvv/base/cpymem-strategy-4.c: Ditto.

gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-1.c		diff \| blob \| blame \| history
gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-3.c		diff \| blob \| blame \| history
gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-strategy-4.c		diff \| blob \| blame \| history

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