]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
spi: atmel-quadspi: Add support for configuring CS timing
authorTudor Ambarus <tudor.ambarus@microchip.com>
Thu, 17 Nov 2022 10:52:45 +0000 (12:52 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 7 Mar 2025 15:56:29 +0000 (16:56 +0100)
commitbaaad6765a5a6760c7a9a42ca42596652fecba18
treef21566dccca3f4f9f4e40cc0c3e1937e47cfa7fa
parent0a09d56e1682c951046bf15542b3e9553046c9f6
spi: atmel-quadspi: Add support for configuring CS timing

[ Upstream commit f732646d0ccd22f42ed7de5e59c0abb7a848e034 ]

The at91 QSPI IP uses a default value of half of the period of the QSPI
clock period for the cs-setup time, which is not always enough, an example
being the sst26vf064b SPI NOR flash which requires a minimum cs-setup time
of 5 ns. It was observed that none of the at91 SoCs can fulfill the
minimum CS setup time for the aforementioned flash, as they operate at
high frequencies and half a period does not suffice for the required CS
setup time. Add support for configuring the CS timing in the controller.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20221117105249.115649-5-tudor.ambarus@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Stable-dep-of: be92ab2de0ee ("spi: atmel-qspi: Memory barriers after memory-mapped I/O")
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/spi/atmel-quadspi.c